The invention relates to a method of manufacturing enveloped semiconductor devices, in which:
semiconductor elements are formed on a first side of a slice of a semiconductor material, paths of the slice's surface situated on this side being left clear between the semiconductor elements, PA1 a metallization with connection electrodes extending as far as the free paths are formed on the first side of the slice, PA1 the slice is glued with its first side onto a transparent insulating supporting body, PA1 semiconductor material is removed from the second side of the slice facing away from the first side, PA1 the slice thus reduced in thickness is provided on its second side with a layer of an insulating material, PA1 grooves are formed in the supporting body, at the location of the free paths, which grooves intersect the connection electrodes of the metallization and extend into the layer of insulating material provided on the second side of the slice, --conductor tracks are formed on the supporting body, which extend in the grooves so as to make contact with the connection electrodes intersected in the grooves, and PA1 the slice is divided, along the grooves, into separate semiconductor devices enveloped by the supporting body and the insulating layer provided on the second side. PA1 use is made of a slice of a semiconductor material which is provided on its first side with an intermediate layer of an insulating material on which a top layer of a semiconductor material is formed, PA1 the semiconductor elements are formed in this top layer, PA1 prior to the formation of the metallization on the first side of the slice, the top layer is removed from the insulating layer at the location of the free paths, and PA1 by removing semiconductor material from the second side, the layer of an insulating material situated below the top layer is exposed.
The enveloped semiconductor device may be extremely thin. After removal of semiconductor material from the second side of the slice, which has a customary thickness of, for example, approximately 600 .mu.m, only a part hereof remains which has a thickness, for example, below 100 .mu.m. The supporting body may also be very thin, i.e. it has a thickness of, for example, 100 .mu.m. Also the layer of insulating material which is provided on the second side may be very thin. The conductor tracks formed on the supporting body may be provided with solder surfaces which enable the semiconductor devices to be mounted in a simple manner on a substrate containing wiring. Also these solder surfaces may be embodied so as to be very thin. An overall thickness of the enveloped semiconductor of approximately 300 .mu.m is feasible. The dimensions of the enveloped semiconductor devices in the lateral direction are hardly larger than the lateral dimensions of the semiconductor elements formed in semiconductor material, which are also referred to as chips. The above-described envelope, also referred to as "Chip Size Package" may comprise, for example, integrated circuits with a memory. By virtue of their small thickness and lateral dimensions, semiconductor devices including such integrated circuits can suitably be used, for example, in credit cards and telephone cards.
In WO 95/19645, a description is given of a method of the type mentioned in the opening paragraph, in which use is made of a customary slice of semiconductor material. After the semiconductor elements and the metallization with connection electrodes are formed on the first side of the slice of semiconductor material and the slice is glued with its first side onto the supporting body, material is removed from the second side until the thickness of the slice is approximately 100 .mu.m. Said slice is provided with grooves, which are also formed from the second side of the slice, within which the semiconductor material is entirely removed. These grooves are formed at the location of the free paths on the surface of the first side of the slice. Subsequently, a glass plate is glued onto the second side. In this process, the grooves in the second side are filled with the insulating material of the adhesive.
The grooves formed in the second side of the slice of semiconductor material must be aligned relative to the free paths on the surface of the first side of the slice. This cannot be readily achieved.
The grooves which are subsequently formed, in the supporting body, from the first side must be formed so as to intersect the connection electrodes without intersecting the semiconductor material of the slice which has been made thinner. In this case, the conductor tracks formed in the grooves will not be short-circuited by semiconductor material which, in practice, is doped and hence will exhibit a certain conductivity. Consequently, the grooves which are formed in the supporting body, from the first side, must be accurately aligned relative to the grooves already formed in the second side of the slice. This aligning operation too cannot be readily performed.
It is an object of the invention to provide a method in which the above aligning problems are reduced.
To achieve this, the method in accordance with the invention is characterized in that
The invention is based on the realization that if use is made of a slice of a semiconductor material which is provided on its first side with an intermediate layer of an insulating material on which a top layer of a semiconductor material is formed, also referred to as Silicon-On-Insulator or SOI slice, the necessary alignment of a number of process steps relative to each other can be carried out from this first side of the slice.
The semiconductor elements are formed on the first side, the metallization with the contact electrodes is formed on the first side, and the grooves in the supporting body, which is transparent, are formed in the first side. The semiconductor material is removed in two steps from the free paths on the surface of the slice. In the first step, alignment is required, while this is not necessary in the second step. In the first step, the top layer is removed from the free paths on the surface of the first side. In the second step, which is carried out from the second side, the semiconductor material situated on the intermediate layer of an insulating material located below the top layer is entirely removed. This takes place throughout the surface of the slice, so that this process does not require aligning.
The layer of an insulating material on the second side of the slice can be applied by providing the second side, after the removal of the semiconductor material from the intermediate layer of an insulating material situated below the top layer, with a glass plate which is glued onto the exposed intermediate layer. Since the intermediate layer of insulating material is exposed after the removal of semiconductor material, the second side exhibits a flat surface. In addition, the second side of the slice is already passivated by the insulating intermediate layer. This is the reason why this second side of the slice is preferably provided with a layer of an insulating material in a different manner.
In a first embodiment, the slice is provided with its second side onto a sawing foil which is customarily used in the semiconductor technique. The grooves formed in the supporting body extend into this sawing foil. By virtue thereof, the division into separate semiconductor devices can be readily achieved by removing them from the sawing foil. Prior to the provision of the sawing foil, the second side may be provided, for example, with a layer of silicon nitride by means of a customary plasma deposition process.
In a second embodiment, a customary epoxy layer is deposited on the second side. On this layer, for example, the type number of the semiconductor device can be printed in a customary manner.
These and other aspects of the invention are apparent from and will be elucidated with reference to the embodiments described hereinafter.